Beschreibung
Projekt Nr.: A6824 Startdatum: sofortBranche: Industrie Unternehmen Dauer: 6-9 Monate mit Option
Einsatzort: Zug Publiziert am: 13.04.2021
Mögliche Vertragsarten: Berater, Verleih
?https://www.ghrgroup.ch/de/kandidaten/vakanzen/details/orderNr/A6824.html
Beschreibung
Für unseren Kunden suchen wir mehrere sehr erfahrene FPGA Software Engineer incl. C++ Java embedded experience wie folgt:
Kurzbeschreibung
? Our client conceptualizes, designs & implements patented & proven industry-leading hardware-based ultra-low-latency and ultra-high-capacity connectivity, market access, risk mitigation, and bespoke solutions.
? With locations in the United States, Japan, Singapore, and now Switzerland, the client is emerging as a global player operating on the cutting-edge of technology to deliver the world’s fastest and highest capacity network-edge computing solutions. The company prides itself on operating an equal-opportunity environment free of discrimination and respectful of heritage, beliefs and lifestyles.
? To support the growth of its business, our client is seeking hardware engineers to join its team in Zug.
Primary day-to-day duties include
? Participate in business requirements discussions and propose, and/or evaluate, solutions to technological and performance requirements
? conduct research to identify possible solutions to requirements
? transform validated and approved solutions into high-level architecture design
? Create and/or modify design schematics and circuitry at a unit and system level
? Execute logic simulations of RTL to verify conformance, functionality, and timing reliability
? Design and implement performance benchmarking tools and plans
? Use agreed-upon tools to manage and maintain project components including code and design documentation, code base/version control, and project management
? Create and/or modify design and code implemented in a software language such as C/C++, Python, Golang, NodeJS, Java, etc. Conduct peer code review
Successful applicants will have the following experience, skills, and characteristics
? FPGA design experience including timing closure, design cycle, simulation, and test tools
? Verilog/SystemVerilog/VHDL and Vivado Simulator (Modelsim/RivieraPro) experience
? Knowledge in verification processes (UVM) Working knowledge of Ethernet/IP/TCP and familiarity with packet processing
? Experience in PCI-Express device driver / Linux kernel module development
? C/C++/JAVA/Embedded Software experience
? Use of Linux (RHEL/Centos) administration and network tools
? Working knowledge of Linux and scripting languages (Shell, Perl)
? Working knowledge of distributed version-control systems (Git preferred)
? English skills required
WICHTIG betreffend COVID
? Momentan gilt Pandemiebedingt beim Kunden eine 100% HomeOffice Regelung.
? Somit wird der komplette Prozess von Onboarding, Einweisungen, Schulungen und die eigentliche Arbeit Remote erfolgen.
? Nach COVID gibt es noch 20-60% Remote Anteil, je nach Situation
Anforderungen
? Python ein Muss
? FPGA Field Programmable Gate Array ein Muss
? C++ ein Muss
? Entwickler ein Muss
Sprachen
?Deutsch gut von Vorteil
?Englisch sehr gut ein Muss
Wir freuen uns auf Ihre Bewerbung
André van Sprundel
CEO
GHR Global Human Resources AG
Blegistrasse 13
CH-6340 Baar / ZG
Direktnr:
E-Mail:
Web: ?http://www.ghrgroup.ch
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